In a Phase-Locked Loop (PLL), a Time-to-Digital Converter (TDC) is used to detect a phase difference between a reference signal and an output signal provided by a digitally-controlled oscillator (DCO) of the PLL. A control signal for the DCO is provided by the TDC based on the detected phase difference. A nonlinearity of the TDC may cause noise in the control signal for the DCO. Hence, a quality of the DCO's output signal may be degraded. The noise generated by the TDC may be dominant compared to quantization noise generated by a frequency divider of the PLL used for controlling a ratio of a frequency of the output signal to a frequency of the reference signal. However, since the output of the TDC is a digital signal, a correction for the TDC's nonlinearity may be applied by means of digital processing circuits. For example, a look-up table with correction values may be used to correct the output of the TDC. However, the digital correction of the TDC's nonlinearity requires precise knowledge about the nonlinearity of the TDC.
Conventional approaches use a closed loop mode of the PLL for determining correction values for the output of the TDC. However, the determined correction values are influenced by a transfer function of the closed loop. Hence, there may be a desire for an improved determination of a correction for an output value of a TDC within a PLL.